VHDL Implementation Of CDMA System

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This Electronics Project discuss design and implementation of VHDL Implementation Of CDMA System. The DS - CDMA is expected to be the major medium access technology in the future mobile systems owing to its potential capacity enhancement and the robustness against noise. The CDMA is uniquely featured by its spectrum-spreading randomization process employing a pseudo-noise (PN) sequence, thus is often called the spread spectrum multiple access (SSMA). As different CDMA users take different PN sequences, each CDMA receiver can discriminate and detect its own signal, by regarding the signals transmitted by other users as noise- like interference's. 

In this project Direct sequence principle based CDMA transmitter and receiver is implemented in VHDL for CPLD. The digital frequency synthesizer principle is used in generating the carrier signals both at transmitter and receiver modules. The transmitter module mainly consists of symbol generator, programmable PN sequence generator, multiplier, digital frequency generator and spreader blocks. The receiver module consists of multiplier, programmable PN sequence generator and comparator blocks.The 4 user CDMA system with the single bit input data is simulated and implemented in CoolRunner 2 CPLD Xc2C256,and the same with 8 bit input data is also simulated in this project.

In communication systems an attractive approach for economical, spectral efficient, and high quality digital cellular and personal communication services is the use of Direct sequence code division multiple access (DS-CDMA) technique. Such a system is characterized by improved privacy and security, increased capacity. VHDL implementation of DS-CDMA transmitter and receiver has been proposed in this project. Every mobile handset and every wireless base station operates on the same frequency spectrum. In order to discriminate one conversation from the other, every handset broadcast a unique code sequence is called as pseudo noise code. Cellular technology has grown tremendously both in terms of traffic and the services it offers. The mobile telecommunication industry facing the problem providing technology that be able to support a variety of services ranging from voice communication with a bit rate of few Kbps to wireless multimedia in which bit rate up to 2 Mbps.

The idea is to transmit signals simultaneously through a linear band limited channel without inter channel or inter symbol interference. In this project pseudo noise code is generated by using two six bit LFSRs. Code signal is called as chip signal. The chips modulated by the carrier using a digital modulation technique BPSK. The carrier is generated by using the technique discrete digital frequency synthesizer. CDMA base stations must be able to discriminate this different code sequences in order to distinguish one transmission from other. This discrimination is accomplished by means of a matched code filter. A matched code filter is a filter whose frequency spectrum is exactly designed to match the frequency spectrum of the input signal. Here matched code filter generating the pseudo noise code, generated noise code is correlated with the received code and detecting original data.

Attachments:
Download this file (VHDL IMPLEMENTATION OF CDMA SYSTEM.pdf)VLSI imlememtation of ODFM[Project Report]1346 Kb

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