I²C PROTOCOL IN FPGA USING VHDL

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I2C (Inter-Integrated Circuit) is a multi master serial computer bus invented by Philips that is used to attach low-speed peripherals to a motherboard, embedded system, or cellphone. It is a two-wire, bidirectional serial bus that is Serial Data line(SDA) and Serial Clock line(SCL) which provides a simple, efficient method of data exchange between devices. It is primarily used in the consumer and telecom market sector and as a board level communications protocol and are most suitable for applications requiring occasional communication over a short distance between many devices. The I2C standard is a true multi master bus including collision synchronization and arbitration that prevents data corruption if two or more masters attempt to control the bus simultaneously.

The I2C controller VHDL code shall feature:

  • Compatibility with Philips I2C bus standard
  • Software programmable timing
  • Clock stretching and wait state generation
  • Arbitration lost interrupt, with automatic transfer cancellation
  • Repeated Start/Stop signal generation/detection
  • Bus busy detection
  • Supports 7 bit addressing.

For 8-bit oriented digital control applications, such as those requiring microcontrollers, certain design criteria can be established:

  • A complete system usually consists of at least one microcontroller and other peripheral devices such as memories and I/O expander's.
  • The cost of connecting the various devices within the system must be minimized
  • A system that performs a control function does not require high-speed data transfer.
  • Overall efficiency depends on the devices chosen and the nature of the interconnecting bus structure

To produce a system to satisfy these criteria, a serial bus structure is needed. Although serial buses do not have the throughput capability of parallel buses, they do require less wiring and fewer IC connecting pins. However, a bus is not merely an interconnecting wire; it embodies all the formats and procedures for communication within the system. Devices communicating with each other on a serial bus must have some form of protocol which avoids all possibilities of confusion, data loss and blockage of information. Fast devices must be able to communicate with slow devices. The system must not be dependent on the devices connected to it, otherwise modifications or improvements would be impossible. A procedure has also to be devised to decide which device will be in control of the bus and when. And, if different devices with different clock speeds are connected to the bus, the bus clock source must be defined. All these criteria are involved in the specification of the I2C bus.

Attachments:
Download this file (i2c.zip)i2c.zip[Source Code]359 Kb
Download this file (i2cReport.pdf)I2C Report[Project Report]661 Kb

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